1) Field
Embodiments of the present invention pertain to the field of semiconductor processing and, in particular, to methods of polysilicon over-etch using hydrogen diluted plasma for three-dimensional gate etch.
2) Description of Related Art
For the past several decades, the scaling of features in integrated circuits has been the driving force behind an ever-growing semiconductor industry. Scaling to smaller and smaller features enables increased densities of functional units on the limited real estate of semiconductor chips. For example, shrinking transistor size allows for the incorporation of an increased number of logic and memory devices on a microprocessor, lending to the fabrication of products with increased complexity. Scaling has not been without consequence, however. As the dimensions of the fundamental building blocks of microelectronic circuitry are reduced and as the sheer number of fundamental building blocks fabricated in a given region is increased, the performance requirements of the materials used in these building blocks have become exceedingly demanding. One example is the change from planar devices to three-dimensional devices in complimentary metal-oxide-semiconductor (CMOS) transistors.